Typical HAL QSPI use cases for migration

This section provides information about the applicable HAL QSPI architecture use cases.

Use case: Configure an Octal PSRAM in memory-mapped mode and perform read/write operations

Sequence diagram

Configure an Octal PSRAM in memory-mapped mode and perform read/write operations

@startuml == Initialization == "Application" -> "QSPI" : HAL_QSPI_Init() "QSPI" --> "Application" : HAL_OK or HAL_INVALID_PARAM "Application" -> "System" : QSPI HW Initialization note right: Initialize GPIO "System" --> "Application" : == Configuration == "Application" -> "QSPI" : HAL_QSPI_Command() note right: Program the OCTAL PSRAM to read/write "QSPI" --> "Application" : HAL_OK or HAL_ERROR "Application" -> "QSPI" : HAL_QSPI_MemoryMapped() "QSPI" --> "Application" : == Process == "Application" -> "System" : Read/Write note right: Read/Write from internal memory "System" --> "Application" : @enduml

Code snippet

HAL1

HAL2 

QSPI_HandleTypeDef QSPIHandle;
QSPIHandle.Instance = QUADSPI;
QSPIHandle.Init.ClockPrescaler     = 1;
QSPIHandle.Init.FifoThreshold      = 4;
QSPIHandle.Init.SampleShifting     = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
QSPIHandle.Init.FlashSize          = QSPI_FLASH_SIZE;
QSPIHandle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
QSPIHandle.Init.ClockMode          = QSPI_CLOCK_MODE_0;
HAL_QSPI_Init(&QSPIHandle);

QSPI_RegularCmdTypeDef scommand = {0};
sCommand.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
sCommand.AddressSize       = QSPI_ADDRESS_24_BITS;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DdrMode           = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;
sCommand.AddressMode       = QSPI_ADDRESS_1_LINE;
sCommand.DataMode          = QSPI_DATA_4_LINES;
sCommand.NbData            = BUFFERSIZE;






























HAL_QSPI_Command(&QUADSPI, &scommand, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);

QSPI_MemoryMappedTypeDef sMemMappedCfg;
sMemMappedCfg.TimeOutActivation = HAL_QSPI_TIMEOUT_COUNTER_ENABLE;
sMemMappedCfg.TimeOutPeriod = 0x34;

HAL_QSPI_MemoryMapped(&QUADSPI, , &sCommand, &sMemMappedCfg);

HAL_XSPI_Init(&xspi, HAL_OCTOSPI1);


/* Main peripheral configuration */
memory_config.mode = HAL_XSPI_MEMORY_SINGLE;
memory_config.type = HAL_XSPI_MEMORY_TYPE_APMEM_16BIT;
memory_config.size_bit = HAL_XSPI_MEMORY_SIZE_256MBIT;
memory_config.wrap_size_byte = HAL_XSPI_WRAP_NOT_SUPPORTED;
memory_config.clock_polarity = HAL_XSPI_CLOCK_LOW;
memory_config.cs_boundary = HAL_XSPI_CS_BOUNDARY_NONE;

timing_config.clk_prescaler = 0x1U;
timing_config.shift = HAL_XSPI_SAMPLE_SHIFT_NONE;
timing_config.hold = HAL_XSPI_DELAY_HOLD_NONE;
timing_config.cs_high_time_cycle = 0x1U;
timing_config.cs_release_time_cycle = 0x0U;
timing_config.cs_refresh_time_cycle = 0x0U;
timing_config.dlyb_state = HAL_XSPI_DLYB_ON;

xspi_config.memory = memory_config;
xspi_config.timing = timing_config;
if (HAL_XSPI_SetConfig(&hOCTOSPI1, &xspi_config) != HAL_OK)
{
  return NULL;
}

command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_8BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = 0xFFFFFFFF;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_8BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.data_mode = HAL_XSPI_REGULAR_DATA_8LINES;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.size_byte = 2;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

hal_xspi_memory_mapped_config_t mem_mapped_cfg;
mem_mapped_cfg.timeout_activation = HAL_XSPI_TIMEOUT_ENABLE;
mem_mapped_cfg.timeout_period_cycle = 0x34;
HAL_XSPI_StartMemoryMappedMode(&xspi, &mem_mapped_cfg);
HAL_XSPI_StopMemoryMappedMode(&xspi);

Use case: Start a write/read in polling indirect mode

Sequence diagram

Start a write/read in polling indirect mode

@startuml == Initialization and configuration == == Process polling mode == "Application" -> "QSPI" : HAL_QSPI_Command() note right: Enable write operation "QSPI" --> "Application" : HAL_OK or HAL_ERROR "Application" -> "QSPI" : HAL_QSPI_AutoPolling() note right: Reconfigure QSPI to automatic polling mode to wait for write enabling "QSPI" --> "Application" : match completed group opt "Application" -> "QSPI" : HAL_QSPI_SetFifoThreshold() note right: Configure the fifo threshold end group "Application" -> "QSPI" : HAL_QSPI_Command() "QSPI" --> "Application" : HAL_OK or HAL_ERROR "Application" -> "QSPI" : HAL_QSPI_Transmit() "QSPI" --> "Application" : "Application" -> "QSPI" : HAL_QSPI_Command() "QSPI" --> "Application" : HAL_OK or HAL_ERROR "Application" -> "QSPI" : HAL_QSPI_AutoPolling() note right: Reconfigure QSPI to automatic polling mode to wait end of operation "QSPI" --> "Application" : match completed "Application" -> "QSPI" : HAL_QSPI_Command() "QSPI" --> "Application" : HAL_OK or HAL_ERROR "Application" -> "QSPI" : HAL_QSPI_Receive() "QSPI" --> "Application" : @enduml

Code snippet

HAL1

HAL2 

/* Perform the init and configuration as per the first use case*/

QSPIHandle.Instance = QUADSPI;
QSPI_CommandTypeDef sCommand;
QSPI_AutoPollingTypeDef sConfig;

sCommand.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
sCommand.Instruction       = WRITE_ENABLE_CMD;
sCommand.AddressMode       = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode          = QSPI_DATA_NONE;
sCommand.DummyCycles       = 0;
sCommand.DdrMode           = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;







HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_AutoPolling(&QSPIHandle, &sCommand, &sConfig, QPSI_TIMEOUT);

HAL_QSPI_SetFifoThreshold(&QSPIHandle, 4);

HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_Transmit(&QSPIHandle, &reg, QPSI_TIMEOUT);

HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_AutoPolling(&QSPIHandle, &sCommand, &sConfig, QPSI_TIMEOUT);

HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_Receive(&QSPIHandle, &reg, QPSI_TIMEOUT);

/* Perform the init and configuration as per the first use case*/

hal_xspi_handle_t xspi;

command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.alternate_bytes = 0U;
command.alternate_bytes_width = HAL_XSPI_ALTERNATE_BYTES_8BIT;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.alternate_bytes_dtr_mode_status = HAL_XSPI_ALTERNATE_BYTES_DTR_DISABLED;
/* Specific parameters for the Sector Erase command */
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_32BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = MX25_FIRST_BLOCK_ADDR;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_32BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.data_mode = HAL_XSPI_REGULAR_DATA_NONE;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
command.size_byte = 2U;
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_ExecRegularAutoPoll(&xspi, &pPollingModeCfg, XSPI_TIMEOUT);

HAL_XSPI_SetFifoThreshold(&xspi, 4);

HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_Transmit(&xspi, p_data, XSPI_TIMEOUT);

HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_ExecRegularAutoPoll(&xspi, &pPollingModeCfg, XSPI_TIMEOUT);

HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_Receive(&xspi, (uint8_t *)aRxBuffer, XSPI_TIMEOUT);

Use case: Start a write/read in interrupt mode

Sequence diagram

Start a write/read in interrupt mode

@startuml == Initialization and configuration == == Process interrupt mode == "Application" -> "QSPI" : HAL_QSPI_Command_IT() "IRQHandler" <- : Interrupt "IRQHandler" -> "QSPI" : HAL_QSPI_IRQHandler() "Application" -> "QSPI" : HAL_QSPI_CmdCpltCallback() "Application" -> "QSPI" : HAL_QSPI_SetFifoThreshold() "Application" -> "QSPI" : HAL_QSPI_Command() "QSPI" --> "Application" : "Application" -> "QSPI" : HAL_QSPI_Transmit_IT() "IRQHandler" <- : Interrupt "IRQHandler" -> "QSPI" : HAL_QSPI_IRQHandler() "Application" -> "QSPI" : HAL_QSPI_TxCpltCallback() "Application" -> "QSPI" : HAL_QSPI_Command() "QSPI" --> "Application" : "Application" -> "QSPI" : HAL_QSPI_Receive_IT() "IRQHandler" <- : Interrupt "IRQHandler" -> "QSPI" : HAL_QSPI_IRQHandler() "QSPI" --> "Application" : HAL_QSPI_RxCpltCallback() @enduml

Related examples in HAL2

Example name

Brief

example_hal_xspi_psram_write_read_it

How to erase part of a PSRAM memory, write data in interrupt mode, and read data in interrupt mode.

Use case: Start a write/read in DMA mode

Sequence diagram

Start a write/read in DMA mode

@startuml == Initialization and configuration == == Process DMA mode == "Application" -> "QSPI" : HAL_QSPI_Command() note right: Reconfigure write operation "QSPI" --> "Application" : "Application" -> "QSPI" : HAL_QSPI_Transmit_DMA() note right: Start DMA channel transfer with interrupt enabled "IRQHandler" <- : Interrupt "IRQHandler" -> "DMA" : HAL_DMA_IRQHandler() "DMA" -> "QSPI" : DMA_Trasfer_Complete "QSPI" --> "Application" : HAL_QSPI_TxCpltCallback() "Application" -> "QSPI" : HAL_QSPI_Command() "Application" -> "QSPI" : HAL_QSPI_AutoPolling_IT() note right : Reconfigure QSPI to AutoPolling mode to wait end of operation "IRQHandler" <- : Interrupt "IRQHandler" --> "QSPI" : HAL_QSPI_IRQHandler() "QSPI" --> "Application" : HAL_QSPI_StatusMatchCallback() "Application" -> "QSPI" : HAL_QSPI_Command() note right: Reconfigure read operation "QSPI" --> "Application" : "Application" -> "QSPI" : HAL_QSPI_Receive_DMA() note right: Start DMA channel transfer with interrupt enabled "IRQHandler" <- : Interrupt "IRQHandler" -> "DMA" : HAL_DMA_IRQHandler() "DMA" -> "QSPI" : DMA_Transfer_Complete "QSPI" --> "Application" : HAL_QSPI_RxCpltCallback() @enduml

Code snippet

HAL1

HAL2 

QSPI_HandleTypeDef QSPIHandle;
 QSPI_RegularCmdTypeDef scommand = {0};

 sCommand.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
 sCommand.AddressSize       = QSPI_ADDRESS_24_BITS;
 sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
 sCommand.DdrMode           = QSPI_DDR_MODE_DISABLE;
 sCommand.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
 sCommand.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;
 sCommand.Instruction = SECTOR_ERASE_CMD;
 sCommand.AddressMode = QSPI_ADDRESS_1_LINE;
 sCommand.Address     = address;
 sCommand.DataMode    = QSPI_DATA_NONE;
 sCommand.DummyCycles = 0;








 HAL_QSPI_Command(&QSPIHandle, &scommand, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);

 HAL_QSPI_Transmit_DMA(&QSPIHandle, aTxBuffer);

 HAL_DMA_IRQHandler(&QSPIHandle);

 HAL_QSPI_TxCpltCallback(&QSPIHandle);

 HAL_QSPI_Command(&QSPIHandle, &command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);

 sConfig.Match           = 0x00;
 sConfig.Mask            = 0x01;
 sConfig.MatchMode       = QSPI_MATCH_MODE_AND;
 sConfig.StatusBytesSize = 1;
 sConfig.Interval        = 0x10;
 sConfig.AutomaticStop   = QSPI_AUTOMATIC_STOP_ENABLE;
 HAL_QSPI_AutoPolling_IT(&QSPIHandle, &sConfig);

 QSPI_IRQHandler(&QSPIHandle);

 HAL_QSPI_StatusMatchCallback(&QSPIHandle);

 HAL_QSPI_Command(&QSPIHandle, &command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);

 HAL_QSPI_Receive_DMA(&QSPIHandle, aRxBuffer);

 HAL_DMA_IRQHandler(&QSPIHandle);

 HAL_QSPI_RxCpltCallback(&QSPIHandle);

 void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi)
 {
   // USER CODE
 }

 void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi)
 {
   // USER CODE
 }

 void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi)
 {
   // USER CODE
 }

hal_xspi_handle_t xspi;


command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.alternate_bytes = 0U;
command.alternate_bytes_width = HAL_XSPI_ALTERNATE_BYTES_8BIT;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.alternate_bytes_dtr_mode_status = HAL_XSPI_ALTERNATE_BYTES_DTR_DISABLED;
/* Specific parameters for the Sector Erase command */
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_32BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = MX25_FIRST_BLOCK_ADDR;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_8BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.data_mode = HAL_XSPI_REGULAR_DATA_NONE;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
command.size_byte = 2;
HAL_XSPI_SendRegularCmd(xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_Transmit_DMA(xspi, data);

HAL_DMA_IRQHandler(xspi);

HAL_XSPI_TxCpltCallback(xspi);

HAL_XSPI_SendRegularCmd(xspi, &command, XSPI_TIMEOUT);

sConfig.MatchMode           = HAL_XSPI_MATCH_MODE_AND;
sConfig.AutomaticStop       = HAL_XSPI_AUTOMATIC_STOP_ENABLE;
sConfig.IntervalTime        = 0x10;
sConfig.MatchMask           = WRITE_ENABLE_MASK_VALUE;
sConfig.MatchValue          = WRITE_ENABLE_MATCH_VALUE;
HAL_XSPI_ExecRegularAutoPoll_IT(xspi, &sConfig);

xspi_IRQHandler(&xspi);

HAL_XSPI_StatusMatchCallback(&xspi);

HAL_XSPI_SendRegularCmd(xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_Receive_DMA(&xspi, (uint8_t *)aRxBuffer);

HAL_DMA_IRQHandler(&xspi);

HAL_XSPI_RxCpltCallback(&xspi);


void HAL_XSPI_TxCpltCallback(XSPI_HandleTypeDef *hxspi)
{
  // USER CODE
}

void HAL_XSPI_RxCpltCallback(XSPI_HandleTypeDef *hxspi)
{
  // USER CODE
}

Related examples in HAL2

Example name

Brief

example_hal_xspi_nor_write_read_dma

How to erase part of a NOR memory, write data in DMA mode, and read data in DMA mode.